Devices, circuits, and architectures for data-centric computing.

The ACED Lab (Architectures, Circuits, and Emerging Devices Laboratory) designs hardware accelerators for AI, security, and data-intensive applications. Our designs are evaluated on energy consumption, throughput, and reliability under realistic workloads.

Whiteboard sketch of the devices, circuits, algorithms, applications, and system stack Research Focus

Rethinking the memory–compute boundary

We work across the full computing stack — from device physics and circuit design to memory architectures and system-level evaluation — to reduce the energy and latency of moving and processing data, strengthen resistance to hardware-level attacks, and meet the throughput and reliability demands of modern data-centric workloads. We exploit emerging devices such as ferroelectric FETs, spin-orbit-torque elements, and resistive RAMs to design computing-in-memory and processing-in-DRAM circuits, embedding logic directly within SRAM, DRAM, and non-volatile memory arrays. From there, we build the architectures and benchmarking tools needed to evaluate these designs for real machine learning, cryptography, and edge-intelligence workloads.

Computing in Memory

Architectures that perform logic and arithmetic directly within memory arrays, using CMOS and emerging non-volatile devices to cut the cost of moving data between memory and processor.

Hardware-Software Co-Design

Connecting AI algorithms and applications to the circuits and architectures that run them, so improvements in memory and circuit design reduce the latency and energy of the workloads that depend on them.

Hardware for Security

Hardware primitives for secure computing, evaluated for their impact on system-level energy consumption, latency, and reliability.

By the numbers

Lab snapshot

50+
Peer-reviewed publications
5
PhD students advised
$685K+
Active research funding (USF share)
3
Patents & patent applications