Current Ph.D. students, undergraduate mentees, and alumni of the ACED Lab.
Dayane Alfenas Reis is an Assistant Professor in the Bellini College of AI, Cybersecurity, and Computing at the University of South Florida, where she has directed the ACED Lab (Architectures, Circuits, and Emerging Devices Laboratory) since Fall 2022. She earned her Ph.D. in Computer Science and Engineering from the University of Notre Dame (2021), co-advised by Prof. X. Sharon Hu and Prof. Michael Niemier, and an M.Sc. in Electrical Engineering from the Federal University of Minas Gerais, Brazil (2016), advised by Prof. Frank Sill Torres.
Her research addresses the energy and latency cost of moving data between memory and processor. This includes designing computing-in-memory architectures that embed logic in SRAM, DRAM, and emerging non-volatile memories; co-designing hardware-friendly AI algorithms — such as hyperdimensional computing and few-shot learning — with the circuits and architectures that run them; and building hardware primitives for secure computing, including in-memory encryption fabrics and low-power accelerators for Boolean satisfiability solving. She is the author of more than 50 peer-reviewed publications, including a Nature Electronics News & Views piece and a U.S. patent on in-memory encryption/decryption fabrics.
She currently serves as PI on an NSF-funded award for memory-centric edge AI hardware (2026–2029), as Co-PI on an NSF Research Traineeship in microelectronics education and training (2024–2029), and as Co-PI on an NSF-funded hardware security workforce-development project (2023–2027); she previously served as Co-PI on a Department of Defense-funded hardware cryptographic accelerator project (2024–2025). She has been appointed Associate Editor of IEEE Transactions on Very Large Scale Integration (VLSI) Systems (term beginning January 2027). She is a 2026 Rising Star in Engineering of the Academy of Science, Engineering and Medicine of Florida (ASEMFL), a Senior Member of IEEE, and a Member of ACM.
The lab regularly presents at flagship VLSI and design-automation venues, as well as broader research and education events.
